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Reinforcing reliable memory to secure the foundation of AI data
Memory ATE

Reinforcing reliable memory to secure the foundation of AI data

Unified Design & Debug System

Unified Design & Debug System

S9120 is a miniaturized DRAM tester that supports testing of DDR4, DDR5, LPDDR4, LPDDR5 chips, and DDR4 and DDR5 DIMMs. It is mainly used by R&D and test engineers to debug test programs. The S9120-WT is additionally equipped with a liquid cooling system with a wider range of test temperatures.
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Product Advantages

  • 01
    Portability: Installation-free, single-person portable desktop equipment
  • 02
    High integration: Supports burn-in testing, high- and low-temperature testing, and core testing
  • 03
    High data rate: Supports test data rate up to 100 MHz / 200 Mbps
  • 04
    Wide temperature range: S9120-HT: Test temperature ranges from 20°C to 90°C; S9120-WT: Test temperature ranges from -10°C to 90°C
  • 05
    High precision: The temperature control accuracy of the chamber is ±1.0°C
  • 06
    Easy operation: Supports various interactive modes such as command line and graphical user interface (GUI), provides abundant visual tools and software interfaces, and is compatible with common ATE test languages, C language, etc.

Product
Features

Target Devices
DDR4/5、 LPDDR4/5、DDR4/5 LPDDR4/5 DIMM
Test Data Rate
With a test rate of 100 MHz / 200 Mbps, two chips can be tested in parallel
Technical Parameters
Digital Channel: 82 IO + 72 DR Device Power Supply: 2 HCPPS+ 1 HVPPS+1 PPS + 4 TMPS Clock Resolution: 625ps Voltage Setting Resolution: 10mV

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